The invention relates to a rectifier circuit, comprising
an arrangement of a first, a second and a third transistor emitters of said transistors being coupled together at a first junction point and to a terminal of a first constant current source and in which arrangement collectors of the first and the second transistor are coupled together at a second junction point, PA1 a current mirror arrangement having a predetermined mirror ratio, an input of said current mirror being coupled to the second junction point and an output of said current mirror being coupled to a collector of the third transistor at a third junction point, wherein PA1 an input voltage, by which the collector-emitter currents of the first and/or the second transistor are controllable, can be supplied to the rectifier circuit via bases of the first and/or the second transistor, while an output voltage can be taken from the base of the third transistor of the rectifier circuit and the output voltage at least substantially corresponds to the rectified input voltage, and PA1 the first, the second and the third transistor have predetermined emitter regions.
In many transmission systems, rectifiers are used, for example, in AM demodulators or level detectors. They are mainly used for measuring signal amplitudes. Precision rectifiers, as are preferably used for AM demodulators, are characterized by a linear characteristic also for small input voltages and, in contrast to, for example, a simple semiconductor diode, thus approximate the characteristic form of an ideal rectifier. Achieving such a characteristic is very difficult and elaborate.
FIG. 1 shows diagrammatically a simple rectifier circuit which can be integrated on a semiconductor body. It comprises an arrangement of a first transistor 1, a second transistor 2 and a third transistor 3, all of which are of the bipolar NPN type and whose emitters are interconnected at a first junction point 9. Furthermore, a first constant current source 12 is connected by one of its terminals to the first junction point 9, while the second terminal of the first constant current source 12 is connected to ground 15. The collectors of the first and the second transistor 1, 2 are further interconnected at a second junction point 10. Moreover, the second junction point 10 is connected to an input of a current mirror arrangement comprising a fifth transistor 5 and a sixth transistor 6. The fifth and the sixth transistor are bipolar transistors of the PNP type. Their emitters are connected to a power supply terminal 16. The bases of the fifth and the sixth transistor are interconnected and are connected to the second junction point 10. Moreover, a collector of the fifth transistor 5 is connected as an input of the current mirror arrangement to this second junction point 10. A collector of the sixth transistor 6 is connected at a third junction point 11 to a collector of the third transistor 3 and constitutes an output of the current mirror arrangement.
The rectifier circuit shown in FIG. 1 further comprises a fourth transistor 4 which is of the bipolar NPN type. The fourth transistor 4 constitutes an output amplifier element of the rectifier circuit shown in FIG. 1. To this end, a collector of the fourth transistor 4 is connected to the power supply terminal 16. A base of the fourth transistor 4 is connected to the third junction point 11. An emitter of the fourth transistor 4 is connected by means of a base of the third transistor 3 and a terminal of a third constant current source 14 to an output terminal 17 of the rectifier circuit. By means of a further terminal, the third constant current source 14 is connected to ground 15.
In the rectifier circuit shown in FIG. 1, bases of the first and the second transistor 1, 2 serve as input terminals of the rectifier circuit. During operation of the rectifier circuit, an input voltage UE is applied between these bases, which input voltage generally comprises a DC component and an AC component in accordance with which the input voltage UE is controlled by said DC component. For the sake of simplicity, the input voltage UE will hereinafter be understood to mean only the AC component. This AC component UE controls the bases of the first and the second transistor 1 symmetrically with respect to said DC component. Due to the control of the described rectifier circuit with the input voltage UE, an output voltage, whose AC component is denoted by UA, is generated at the output terminal 17.
The rectifier circuit shown in FIG. 1 operates as a voltage follower. This results in the following division for the collector-emitter currents I1, I2, I3, I5, I6 in the first, the second, the third, the fifth and the sixth transistor 1, 2, 3, 5, 6, assuming that all of these transistors have the same emitter regions and that the mirror ratio of the current mirror arrangement 5, 6 to 1 is thus chosen. Without an AC component UE of the input voltage, i.e. without control of the input of the rectifier circuit, the same currents, i.e. I1 is equal to I2, flow in the collector-emitter paths of the first and the second transistor 1, 2. The sum of both currents, I1+I2, is equal to the input current I5 of the current mirror arrangement 5, 6, i.e. equal to the collector-emitter current of the fifth transistor 5. This in turn corresponds to the current I6 and, while ignoring the base current of the fourth transistor 4, the current I6 corresponds to the collector-emitter current I3 of the third transistor 3. Its value for UE=0, i.e. the working point current in the third transistor 3, is denoted by 10. For UE=0, I5 and I6 are therefore I0, while the collector-emitter currents I1 and I2 of the first and the second transistor 1, 2 assume the value I0/2, and the constant current I012 supplied by the first constant current source 12 corresponds to the double value of the working point current I0 of the third transistor 3.
Since the current density in the first and the second transistor 1, 2 is thus half as large as the current density in the third transistor 3, the first and the second transistor 1, 2 for UE=0, i.e. at the working point of the rectifier circuit, have a base-emitter voltage which is lower than the base-emitter voltage of the third transistor 3 at the working point. A voltage shift thereby results for the output voltage UA at the output terminal of the rectifier circuit, which voltage shift corresponds to the temperature voltage of the bipolar transistors 1, 2, 3 used in the rectifier circuit shown, multiplied by the natural logarithm of the number 2. At room temperature, this is a value of 18 mV for bipolar silicon transistors.
When, starting from the working point at UE=0, the value for the input voltage UE is increased, the input voltage UE assumes positive values and the second transistor 2 becomes more conducting than the first transistor 1. The second transistor thus takes over more and more collector-emitter current from the first transistor. Consequently, the current density in the second transistor approaches that in the first transistor because the value of the current I2 approaches the value of the current I5 and thus the value of the current I3 in the process described. Consequently, the difference between the base-emitter voltages of the second and the third transistor 2, 3 is reduced, and the voltage shift between the input voltage UE and the output voltage UA of the rectifier circuit shown in FIG. 1 is reduced. In a border case, the current I1=0 and UE=UA. The output voltage UA then exactly follows the input voltage UE.
If, in contrast, the value of the input voltage UE is reduced, i.e. when UE assumes negative values, starting from the working point, the first transistor 1 more and more takes over the collector-emitter current of the second transistor 2. Then, the value of the current I1 approaches the current I3 more and more and the voltage shift between the input voltage UE and the output voltage UA is also reduced. In both border cases, in which the amount of the value of the input voltage UE is large with respect to 0, the currents I3, I5, I6 as well as the currents I1 and I2 still only flowing in the first and the second transistor 1, 2, respectively, assume the value I0.
FIG. 2 shows the characteristic described above between the input voltage UE and the output voltage UA of the rectifier circuit of FIG. 1 as a solid-line characteristic curve. The non-linear rounding of this characteristic curve in the range of the working point is shown diagrammatically. Due to this non-linear distortion, the rectifier circuit of FIG. 1 is no longer usable for precision rectifiers which, on the one hand, must comply with very stringent requirements imposed on the linearity of signal transmission and, on the other hand, must also transmit signals of small voltage amplitudes with a very small distortion.